Stream Processor Architecture

In this monograph, Professor Rixner shows how a stream processor … After reviewing the architecture and the flow stream processor set, Professor Rix-….

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Stream Processor Architecture
Table of Contents

  • Foreword…ix
  • Acknowledgements…xiii
  • 1 Introduction … 1
  • 1.1 Stream Architecture…2
  • 1.1.1 Stream Programming …2
  • 1.1.2 Bandwidth Hierarchy …4
  • 1.1.3 Parallel Processing…6
  • 1.2 The Imagine Media Processor…7
  • 1.3 Contributions…9
  • 1.4 Overview …9
  • 2 Background… 11
  • 2.1 Special-purpose Media Processors…11
  • 2.2 Programmable Media Processors …12
  • 2.3 Vector Processors …13
  • 2.4 Stream Processors …13
  • 2.5 Storage Hierarchy…14
  • 2.6 DRAM Access Scheduling…15
  • 2.7 Summary …16
  • 3 Media Processing Applications … 19
  • 3.1 Media Processing …19
  • 3.2 Sample Applications …20
  • 3.2.1 Stereo Depth Extraction…20
  • 3.2.2 MPEG2 Encoding …20
  • 3.2.3 QR Matrix Decomposition …21
  • 3.2.4 Space-time Adaptive Processing …21
  • 3.2.5 Polygon Rendering…21
  • 3.3 Application Characteristics …22
  • 3.3.1 Operations…22
  • 3.3.2 Global Data…23
  • 3.3.3 Compute Intensity…24
  • 3.3.4 Summary…24
  • 4 The Imagine Stream Processor … 27
  • 4.1 Stream Processing …28
  • 4.1.1 Stream Programming …29
  • 4.1.2 MPEG2 I-frame Encoding …30
  • 4.2 Architecture…34
  • 4.2.1 Stream Register File (SRF) …35
  • 4.2.2 Arithmetic Clusters…37
  • 4.2.3 Microcontroller …39
  • 4.2.4 Streaming Memory System …40
  • 4.2.5 Network Interface…42
  • 4.2.6 Stream Controller…43
  • 4.2.7 Host Processor …43
  • 4.3 Programming Model …44
  • 4.3.1 Stream-level Programming …44
  • 4.3.2 Kernel-level Programming…47
  • 4.4 Implementation…48
  • 4.5 Scalability and Extensibility…50
  • 4.5.1 Scalability…50
  • 4.5.2 Extensibility…51
  • 5 Data Bandwidth Hierarchy … 53
  • 5.1 Overview …53
  • 5.2 Communication Bottlenecks …56
  • 5.2.1 Register File Structure …58
  • 5.2.2 Cache Hierarchy …58
  • 5.2.3 DRAM…59
  • 5.3 Register Organization…60
  • 5.4 Evaluation…64
  • 5.4.1 Kernel Comparison …65
  • 5.4.2 Application Evaluation…72
  • 5.4.3 Application Bandwidth Demands…75
  • 5.4.4 Bandwidth Sensitivity…78
  • 5.4.5 Arithmetic Unit Utilization…79
  • 5.5 Summary …82
  • 6 Memory Access Scheduling… 83
  • 6.1 Overview …84
  • 6.1.1 Stream Memory Transfers …84
  • 6.1.2 Memory Access Scheduling…86
  • 6.2 Modern DRAM …88
  • 6.3 Memory Access Scheduling…92
  • 6.3.1 Architecture…92
  • 6.3.2 Algorithms…94
  • 6.4 Evaluation…96
  • 6.4.1 Microbenchmarks…96
  • 6.4.2 Memory Demands …100
  • 6.4.3 Application Performance …101
  • 6.5 Summary …105
  • 7 Conclusions … 107
  • 7.1 Imagine Summary …108
  • 7.2 Future Architectures…109
  • References … 113
  • Index… 119

 

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